Field of the Invention
The present invention relates to integrated circuit memory technology, including high density, nonvolatile memory.
Description of Related Art
One type of array architecture for nonvolatile memory is known as a virtual ground array. In virtual ground arrays, and other memory cell structures, buried diffusion lines can be disposed on a substrate, separated by channel regions. Word lines and data storage structures, such as floating gates or dielectric charge trapping structures, overlie the channel regions, forming a dense array of memory cells.
As the scale of the memory cells is reduced, challenges are created in the design of virtual ground arrays, and other types of memory cells. For example, it is desirable that the buried diffusion lines have low resistance, provide good punch through immunity for the memory cells, and support good programming efficiency and low data disturbance. Also, it is desirable to provide deep impurities in the buried diffusion lines, to block secondary electrons generated in neighboring cells from affecting the local channel region.
However, as the buried diffusion lines become narrower, the resistance of the lines becomes higher. Higher resistance in the buried diffusion lines can slow down operating speeds, including programming speeds for flash memory. With channel lengths and source/drain line widths about 50 nanometers, and below, memory performance has degraded.
Accordingly, it would be desirable to provide a technology enabling formation of dense memory arrays, including dense virtual ground flash memory arrays, that provides for high speed operation, and good endurance.